As the circuitry of NAND flash-based, solid-state drives shrinks, performance drops precipitously — meaning the technology could be doomed, according to new research.
Speaking to about 500 attendees at the 10th Usenix Conference on File and Storage Technologies here this week, Laura Grupp, a graduate student at the University of California, San Diego, said that as NAND flash densities increase, so do issues such as read and write latency and data errors.
While the density of SSDs grows and the cost per gigabyte shrinks, “everything else about them is poised to get worse,” Grupp said.
“This makes the future of SSDs cloudy: While the growing capacity of SSDs and high IOP rates will make them attractive for many applications, the reduction in performance that is necessary to increase capacity while keeping costs in check may make it difficult for SSDs to scale as a viable technology for some applications,” Grupp, lead author of the study, wrote in a research paper.
Grupp, along with Steven Swanson, director of UCSD’s Non-Volatile Systems Laboratory, and John Davis of Microsoft Research, tested 45 different NAND flash chips that ranged in size from 72 nanometer (nm) circuitry to today’s 25nm technology. The chips came from six vendors.
The tests revealed that the program speed (write speed) for pages in a flash block suffered dramatic and predictable variations in latency. And, as the NAND flash wore out, error rates also varied widely between devices. Single-level cell (SLC) NAND held up the best in the tests, while multi-level cell (MLC), and in particular, triple-level cell (TLC) NAND, produced the worst results.
The researchers took their empirical results and extrapolated them to the year 2024, when NAND flash development road maps show flash circuitry is expected to be only 6.5nm in size. At that time, read/write latency is expected to double in MLC flash and increase more than 2.5 times for TLC flash.
In addition, bit error rates increased by a factor of more than three, according to the researchers. “We can either have capacity or performance,” Grupp said.
The researchers used PCIe-based flash cards with a channel speed of 400MBps based on the Open NAND Flash Interface (ONFI) specification and a standard 96 NAND flash dies, which is typical of SSDs.
The researchers did not use specialized NAND flash controllers as are used by SSD vendors such as Intel, OCZ or Fusion-io. Instead their results were baseline and considered “optimistic” because they didn’t include latency added through error correction or garbage collection algorithms.
Because SSDs have no moving parts, the time needed to write and read data is more than 100 times faster than that of hard disk drives that use read-write heads on actuator arms to find data on a spinning platter. But as NAND flash circuitry continues to shrink in size, the performance gap with hard disk drives will become more narrow, Grupp said.
By the time NAND flash shrinks from 25nm today to 6.5nm in 2024, SSDs based on TLC flash will sport as much as 16TB of capacity and MLC flash SSDs will have 4TB, Grupp said.
Considering the diminishing returns on performance versus capacity, Grupp said, “it’s not going to be viable to go past 6.5nm … 2024 is the end.”
However, even with TLC flash at 6.5nm, Grupp calculates that SSDs will continue to outperform hard disk drives on throughput, 32,000 IOPS to 200 IOPS, respectively.
NAND flash memory chips are used to build solid-state drives (flash storage in a hard drive form factor) and PCIe-based flash cards. Over the past six years or so, the transistor size of NAND flash chips has shrunk from 72nm to 25nm, which allows more data to be stored with the same number of flash dies.
But as the size of the circuitry diminishes, so do the walls of cells that hold the electrons, which in turn represent bits of data. As cell walls thin out, electrons leak through and create data errors, which requires additional error correction code.
The first SSDs only stored 1 bit of data per NAND flash cell, which is known as SLC flash. Next came MLC flash, which offered two bits per cell. Most recently, vendors have begun producing triple-level cell (TLC) flash, which stores three bits of data per cell. The most common NAND flash remains MLC, but that’s expected to change as vendors strive to produce higher capacity SSDs in order to compete with hard disk drive capacities.
Flash memory, however, wears out over time as data is marked for deletion and moved and new data is written in a process known as a program-erase cycle (P/E cycle). Special firmware in today’s drive controllers more evenly spreads data throughout the drive to give the media greater endurance, but ultimately, NAND flash has a finite number of P/E cycles.
SLC flash has the highest reliability and resiliency, with 50,000 to 100,000 program/erase (P/E) cycles. MLC NAND can sustain 5,000 to 10,000 erase cycles. TLC NAND has the lowest endurance, with 1,000 P/E cycles to as few as 500 P/E cycles, the researchers found.
“It’s a pretty dramatic decline,” Grupp said. “[People] are used to working with technology that continues to just get better, but with NAND flash we’re going to be facing trade-offs as it evolves.”
Lucas Mearian covers storage, disaster recovery and business continuity, financial services infrastructure and health care IT for Computerworld. Follow Lucas on Twitter at @lucasmearian, or subscribe to Lucas’s RSS feed. His email address is firstname.lastname@example.org.